The MIT team has developed a new manufacturing method that can integrate high-performance nitride transistors into standard silicon CMOS chips at a lower cost.
Gallium nitride (GaN) is the second hot semiconductor material only in silicon, and it is also the key to the next generation of high-speed communication systems and electronic equipment required by advanced data centers. In order to obtain higher performance, scientists connect GaN wafers to silicon wafers, but the welding method will limit the size of GaN transistors. If the entire GaN wafer is integrated into the silicon wafer, the cost is very high, so the road to commercialization is still limited.
To solve this problem, the MIT team recently developed a low-cost, scalable 3D layer new technology that integrates high-performance GaN transistors into standard silicon CMOS chips and is compatible with existing semiconductor processes, breaking through existing GaN application limitations, promoting the development of high-speed communications, and is expected to promote cutting-edge technologies such as quantum computing.
The method firstly builds many micro transistors on the surface of the GaN wafer, then cuts each transistor into 240 x 410 microns with fine laser technology, and has a micro copper column at the top of each transistor. Then, a certain number of transistors are bonded to the silicon wafer at minus 400 ℃, thereby retaining the function of the two materials and clearly improving performance.
In addition, the GaN circuit is composed of a dispersed transistor dispersed on the silicon wafer, which can also reduce the overall system temperature.
The research team used this method to develop power amplifiers and successfully achieved higher signal strength and efficiency than silicon transistor equipment. In smart phones, this can improve communication quality, increase wireless frequency width, increase connection strength and extend battery life.
This study demonstrates the three-dimensional integration capabilities of multidiazode chips and silicon CMOS, breaking through the current technological boundaries, and is expected to bring faster and more energy-efficient electronic products.
New 3D chips could make electronics faster and more energy-efficient