Cadence has established the first 3D-IC smart system design and verification service platform in Taiwan

Cadence, a global leader in electronic design innovation, announced today (15th) that the "full-process smart system design implementation automatic research and development partner planning" jointly with the Ministry of Economics has created a major milestone. This project successfully assisted the Industrial Research Institute in building the first "full process 3D-IC intelligent system design and verification service platform" in Taiwan, launching 3D-IC Turnkey Design Service, Heterogeneous Integration Shuttle Service, Memory-on-Logic AI chip technology MOSAIC, and Yongle’s 2024 Top 100 Global Science and Technology Research and Development Awards.

According to Fortune Business Insights estimates, the generative AI market size will grow from US$67 billion in 2024 to US$967.6 billion in 2032, with an average annual composite synthesis rate of up to 39.6%. In order to help the industry accelerate the introduction of generative AI applications, Cadence and the Industrial Research Institute have cooperated in hand to establish the "AI Perceptual Computing System Co-creation Laboratory" to provide full-process (chip-packaging-system) design and verification services. It has directly served 12 small and medium-sized enterprises and 7 large enterprises, and assisted Taiwanese industry enterprises to participate in AI business operations. For example, the Industrial Research Institute has cooperated with financial technology operators to use AI technology to launch new financial services.

Guo Zhaozhong, Director of the Department of Industry Technology of the Ministry of Economic Affairs, said: "This cooperation between the Ministry of Economic Affairs and Cadence successfully assisted the Institute of Technology to establish Taiwan's first full-process 3D-IC smart design verification platform and AI perceptual computing system co-creation laboratory, injecting strong innovation energy into the domestic semiconductor industry and driving the implementation of AI industry applications. AI technology has become the core force to drive future industry development, through Cadence Such partnerships with world-leading technology will accelerate Taiwan's development in the AI ​​chip design field and enhance the international competitiveness of the overall industry. ”

Cadence held the "A+ Achievement Exhibition of Full Process Intelligent System Design and GenIC Generative Chip Design Round Table Forum" today (5/15), focusing on three major themes:

Full-process intelligent system design 3D-IC Turnkey Service's design/manufacturing service new business machine Cadence cooperates with the Industrial Research Institute to assist in the implementation of industry applications – AI Smart Finance Solution Agentic AI Energy-Entertainment Chip Design Automation-Foresight GenIC Generative Chip Design Technology Exploration

This event specially invited Guo Zhaozhong, Director of the Department of Industry and Technology of the Ministry of Economic Affairs, to have in-depth exchanges with Teng Han-ying, Vice President of Cadence and General Manager of Digital and Certification Affairs Group, on the arduous achievements of bilateral cooperation and future development. In addition, the event also gathered leaders from all walks of life in production and research, including Pan Jiancheng, executive director of Group Electronics, Zhang Shijie, director of the Institute of Optical Systems of the Institute of Industrial Research Institute, Professor Liu Jingjia, vice president of the Semiconductor College of Tsinghua University, Professor Jiang Jiehong, director of the Department of Electronic Engineering at Taiwan University, and experts such as Don Chan, vice president of Cadence R&D, and other experts jointly inspired innovative thinking in GenIC technology.

Full process 3D-IC smart system design and verification service platform

To meet future high-performance computing needs, the integration of 3D-IC stacking and small wafer heterogeneous quality has become the key strategy for the extension of Morrow's law. In response to the complex challenges facing 3D-IC design and heterogeneous integration, the full-process 3D-IC smart system design and verification service platform jointly cooperated with the Industrial Research Institute, fully adopting Cadence's leading 3D-IC full-process technology, successfully integrating core links such as design, analysis and verification, and injecting strong innovative energy into Taiwan's semiconductor industry. Through this platform, the Industrial Research Institute has successfully assisted its industrial partners in implementing the application of AI chips, fully demonstrating its outstanding achievements in accelerating product development and improving design efficiency.

Explore chip design automation technology – GenIC Generative chip design automation

With the significant increase in complexity between AI chips and system design, the chip design process is undergoing a profound transformation. From the typical example chip design automation in the past, we have gradually evolved to introduce the design automation process of AI intelligent assistance (Copilot), and will be further promoted to the development trend of agent AI (Agentic AI) in the future. Agent AI is based on large language model (LLM) and uses natural language (NL) as the design interface, which can help design and developer explore larger-scale and more diverse chip architectures, while optimizing power consumption, efficiency, area and time, further improving chip design and production efficiency. For many years, Cadence has led EDA industries with its AI driver platform, helping customers to introduce generative AI into the design process. With its profound AI research and development capabilities and the media through this cooperation platform, Cadence will conduct manual research and research circles to jointly explore the exciting GenIC generator chip design automation technology, hoping to inject innovative energy into AI industries in Taiwan and even the world.

Cadence Taiwan Yihua General Manager Song Baian said: "We are very fortunate to work with the Ministry of Economic Affairs and the Institute of Technology to jointly create this milestone 3D-IC smart design verification platform. This achievement not only demonstrates Cadence's leading position in the design of full-process smart system, but also proves that through close cooperation in official research, it can effectively promote technological innovation and application implementation. With the successful experience of this platform, Cadence will continue to strengthen its partnership with Taiwan's official research, and with the profound strength of full-process design, it will help the development and application of automatic generation chip design, inject innovative energy into Taiwan's semiconductor industry and open a new machine for the development of innovative industries. ”